1. Field of the Invention
The present invention relates to a chassis type switch including a plurality of line cards within a chassis (casing).
2. Description of the Related Art
A chassis type switch is known which includes a plurality of line cards within a chassis.
There is a chassis type switch of the type including an FDB (Forwarding Database) installed in each of the line cards, and executing frame transfer among the line cards in accordance with the FDB. The term “FDB” implies a database for defining correspondence between a destination MAC (Media Access Control) address and an output port (i.e., an identifier of a line card and an identifier of the output port at a transfer destination, or an identifier of an LAG (Link Aggregation Group)). The term “LAG” implies a technique of bundling a plurality of transmission lines together and virtually handling the bundled transmission lines as one transmission line. Plural ports set in the LAG are collectively handled as one port.
In the chassis type switch, when a unicast frame is received, the line card having received the unicast frame refers to the FDB, which is installed therein, and extracts the identifier of the line card and the identifier of the output port (or the identifier of the LAG) at the transfer destination corresponding to the destination MAC address of the received frame. The relevant line card then transfers the frame to the extracted transfer destination. When the destination MAC address of the received frame is not registered in the FDB, a process of setting the relevant frame to be a destination unknown frame (“unknown”) and transferring the destination unknown frame to all ports of the relevant line card other than a reception port thereof and to all other line cards is executed (such a process is called “flooding”).
In the chassis type switch, if a failure or another trouble occurs in any line card within the device, the unicast frame to be transferred to the line card having caused the failure is not normally relayed and communication is interrupted. It is therefore desired that, if a failure has occurred in any line card, switching-over to a backup route is performed in a time as short as possible.
In the related-art chassis type switch, if the occurrence of a failure in the line card within the device is detected, each FDB entry corresponding to the line card in which the failure has been detected is erased with software (such an erasing process is called “FDB flush”). When the FDB flush is executed, the unicast frame is subjected to the flooding as the destination unknown frame, and switching-over to the backup route is performed.
There are following patent documents as related-art information with regard to the invention of this application.    Japanese Unexamined Patent Application Publication No. 2010-263395    Japanese Unexamined Patent Application Publication No. 2008-136013    Japanese Unexamined Patent Application Publication No. 2011-29829
In the related-art chassis type switch described above, however, a problem arises in that about several hundreds milliseconds (ms) are taken from the detection of the failure of the line card to the switching-over of the route, and that the communication is interrupted for a very long time. The reason will be described in detail below.
Let here consider the case where, as illustrated in FIG. 4A, in a ring network 41 constituted by four network relays 42a to 42d, including the related-art chassis type switch denoted by 42a, which are successively connected counterclockwise in the ring form, a unicast frame is transmitted from a terminal 43a (MAC address of 01:0a), which is connected to the chassis type switch 42a, to a terminal 43b (MAC address of 01:0b), which is connected to the network relay 42c. It is here assumed that the terminal 43a is connected to a port 10 of a tenth line card in the chassis type switch 42a, and that an LAG 10 set for a first line card in the chassis type switch 42a is connected to the network relay 42b. Furthermore, it is assumed that a port of the network relay 42d, which port is connected to the network relay 42c, is set to a blocking state of inhibiting transmission and reception of a frame.
When the unicast frame destined for the terminal 43b from the terminal 43a is received by the tenth line card in the chassis type switch 42a, the tenth line card refers to an FDS 44 installed therein, and extracts a transfer destination (LAG 10) corresponding to the destination MAC address (01: 0b) of the received frame. Because the LAG 10 is set in the first line card in this case, the unicast frame received by the tenth line card is transferred from the tenth line card to the first line card, and is transmitted from any one of ports of the first line card for which the LAG 10 is set. The frame transmitted from the first line card in the chassis type switch 42a reaches the terminal 43b through the network relays 42b and 42c. 
Suppose here that, as illustrated in FIG. 4B, a failure has occurred in the first line card in the chassis type switch 42a. In the related-art chassis type switch 42a, the failure of the line card is detected by a management card (not illustrated) within the chassis type switch 42a, and the management card executes, for example, the FDB flush in each of the line cards by transmitting a control frame to all the line cards in order to erase each FDB entry corresponding to the line card in which the failure has been detected (the control frame is not transmitted depending on the type of system). The communication between both the terminals 43a and 43b is interrupted until the end of the FDB flush.
Upon the end of the FDB flush, the unicast frame destined for the terminal 43b is determined by the tenth line card to be “Destination Unknown” and is subjected to the flooding. As a result, the relevant unicast frame is transferred to the network relay 42d, whereby the route is switched over.
Thus, in the related-art chassis type switch 42a, after the failure of the line card has been detected by the management card, it is required to erase corresponding FDB entries in all the line cards with software by communicating the control frame between the management card and each line card. In addition, the operation of erasing the FDB entries takes a time in itself. Consequently, several hundreds milliseconds (ms) are taken from the detection of the failure of the line card to the switching-over of the route (even in the system not transmitting the control frame, a time is required to erase the FDB entries and several hundreds milliseconds (ms) are also taken from the detection of the failure of the line card to the switching-over of the route). The time from the detection of the failure of the line card to the switching-over of the route is desirably as short as possible because the communication between both the terminals 43a and 43b is interrupted during that time.